A microprocessor is well known to include a datapath section as well as logic and control sections. Each such section includes functional elements which are clocked in order to achieve synchronous operation as is well known.
One of the most difficult design problems of a microprocessor is to generate skew-free clock signals in order to synchronize the functional elements. In this connection, the term "skew" is defined as irregular variations in the timing of transitions in the clock signal which occur primarily because of the organization of the clock source itself. For example, whenever a clock source includes a buffer, a skew of the order of one nanosecond (1 ns) is inevitably added. Also, when a clock source includes a counter, the output waveform of the source is sensitive to layout parasitics, process variations, temperature and the duty cycle of the input clock. Consequently, skew in excess of 1 ns not only can occur but is difficult to avoid.